atomic.h

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00001 /*
00002  * Copyright (C) 2006, 2007, 2009, 2012  Internet Systems Consortium, Inc. ("ISC")
00003  *
00004  * Permission to use, copy, modify, and/or distribute this software for any
00005  * purpose with or without fee is hereby granted, provided that the above
00006  * copyright notice and this permission notice appear in all copies.
00007  *
00008  * THE SOFTWARE IS PROVIDED "AS IS" AND ISC DISCLAIMS ALL WARRANTIES WITH
00009  * REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY
00010  * AND FITNESS.  IN NO EVENT SHALL ISC BE LIABLE FOR ANY SPECIAL, DIRECT,
00011  * INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
00012  * LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE
00013  * OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
00014  * PERFORMANCE OF THIS SOFTWARE.
00015  */
00016 
00017 /* $Id: atomic.h,v 1.7 2009/06/24 02:22:50 marka Exp $ */
00018 
00019 #ifndef ISC_ATOMIC_H
00020 #define ISC_ATOMIC_H 1
00021 
00022 #include <isc/platform.h>
00023 #include <isc/types.h>
00024 
00025 #ifdef ISC_PLATFORM_USEGCCASM
00026 /*
00027  * This routine atomically increments the value stored in 'p' by 'val', and
00028  * returns the previous value.
00029  *
00030  * Open issue: can 'fetchadd' make the code faster for some particular values
00031  * (e.g., 1 and -1)?
00032  */
00033 static inline isc_int32_t
00034 #ifdef __GNUC__
00035 __attribute__ ((unused))
00036 #endif
00037 isc_atomic_xadd(isc_int32_t *p, isc_int32_t val)
00038 {
00039         isc_int32_t prev, swapped;
00040 
00041         for (prev = *(volatile isc_int32_t *)p; ; prev = swapped) {
00042                 swapped = prev + val;
00043                 __asm__ volatile(
00044                         "mov ar.ccv=%2;;"
00045                         "cmpxchg4.acq %0=%4,%3,ar.ccv"
00046                         : "=r" (swapped), "=m" (*p)
00047                         : "r" (prev), "r" (swapped), "m" (*p)
00048                         : "memory");
00049                 if (swapped == prev)
00050                         break;
00051         }
00052 
00053         return (prev);
00054 }
00055 
00056 /*
00057  * This routine atomically stores the value 'val' in 'p'.
00058  */
00059 static inline void
00060 #ifdef __GNUC__
00061 __attribute__ ((unused))
00062 #endif
00063 isc_atomic_store(isc_int32_t *p, isc_int32_t val)
00064 {
00065         __asm__ volatile(
00066                 "st4.rel %0=%1"
00067                 : "=m" (*p)
00068                 : "r" (val)
00069                 : "memory"
00070                 );
00071 }
00072 
00073 /*
00074  * This routine atomically replaces the value in 'p' with 'val', if the
00075  * original value is equal to 'cmpval'.  The original value is returned in any
00076  * case.
00077  */
00078 static inline isc_int32_t
00079 #ifdef __GNUC__
00080 __attribute__ ((unused))
00081 #endif
00082 isc_atomic_cmpxchg(isc_int32_t *p, isc_int32_t cmpval, isc_int32_t val)
00083 {
00084         isc_int32_t ret;
00085 
00086         __asm__ volatile(
00087                 "mov ar.ccv=%2;;"
00088                 "cmpxchg4.acq %0=%4,%3,ar.ccv"
00089                 : "=r" (ret), "=m" (*p)
00090                 : "r" (cmpval), "r" (val), "m" (*p)
00091                 : "memory");
00092 
00093         return (ret);
00094 }
00095 #else /* !ISC_PLATFORM_USEGCCASM */
00096 
00097 #error "unsupported compiler.  disable atomic ops by --disable-atomic"
00098 
00099 #endif
00100 #endif /* ISC_ATOMIC_H */

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